Cirrus Logic CS8427 - Manual (Page 60)

CS8427
60 DS477F5
21. REVISION HISTORY
Release Date Changes
PP1 November 1999 1st Preliminary Release
PP2 November 2000 2nd Preliminary Release
PP3 May 2001 3rd Preliminary Release
PP4 February 2003 4th Preliminary Release
F1 January 2004 Final Release
Updated “Appendix C: PLL Filter” on page 55 to include information from errata
ER477E2
F2 July 2004 Add lead free ordering information
F3 January 2005 -Changed format of Figures 15 and 16 on page 23 and page 24.
-Corrected AES3 Direct format in figure 16 on page 24 and text reference to
AES3 Direct format on page 15.
-Changed description of DETC, EFTC, DETU, and EFTU bits in “Control Port
Register Bit Definitions” on page 32 and page 33.
F4 October 2009 Updated and moved “Ordering Information” on page 49
F5 May 2010 Updated description in “OMCK/RMCK Ratio (1Eh) (Read Only)” on page 38
Table 9. Revision History
Contacting Cirrus Logic Support
For all product questions and inquiries contact a Cirrus Logic Sales Representative.
To find the one nearest to you go to
www.cirrus.com
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