Cirrus Logic CS8427 - Manual (Page 20)

CS8427
20 DS477F5
SIMS
PLL
TXP
TXN
SDOUT
OSCLK
OLRCK
OMCK RMCK
RXP
ILRCK
ISCLK
SDIN
MUX
MUX
MUX
SWCLK
UNLOCK
0 1
0
1
0 1
CHANNEL
STATUS
MEMORY
USER
BIT
MEMORY
TRANSMIT
AES3
SERIAL
AUDIO
OUTPUT
INC RXD0
MUX
0 1
OUTC
SERIAL
AUDIO
INPUT
RXD1
MUX
0
1
÷
CLK[1:0]
÷
RMCKF
Figure 8. CS8427 Clock Routing
Note: When SWCLK mode is enabled, signal input on OMCK is only output through RMCK and
not routed back through the RXD1 multiplexer; RMCK is not bi-directional in this mode. *