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Spw-10x spacewire router, User manual, Preliminary – Atmel SpaceWire Router SpW-10X User Manual

Page 136: Electrical characteristics, 1 dc characteristics

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Ref.: UoD_SpW-10X_

UserManual

Issue: 3.4

SpW-10X

SpaceWire Router

User Manual

Date: 11

th

July 2008

Preliminary

136

11. ELECTRICAL CHARACTERISTICS

The electrical characteristics for the SpaceWire router are defined in this section

11.1 DC CHARACTERISTICS

The operating conditions are listed in Table 11-1. For a detailed list of the operating conditions see
[AD3].

Table 11-1 Operating Conditions

Symbol

Description Value

Units

V

DD

Supply voltage

3.0 to 3.6 V

T

A

Ambient temperature

-55 to +125 °C

P

ST

Static power (CLK input is static, after reset)

1 max W

P

OFF

Total OFF power (static and dynamic): Reset active
power consumption (CLK input with 30 MHz signal,
RSTN active)

1.6 max W

2.4 max at 10 Mb/s

(2)

W

3.0 max at 100 Mb/s

(2)

W

P

OP

(3)

Total operational power with all interfaces active
including external ports.

(1)

3.7 max at 200 Mb/s W

(1) If a SpW IF is not active (clock and LVDS drivers switched off) assume a reduction of P

OP

by:

(P

OP

- P

OFF

) x 0.1 + 0.06;

Example: 2 SpW interfaces deactivated at 200 Mb/s:

Operational power = 3.7 – ((3.7 – 1.6) x 0.1 + 0.06) x 2 = 3.16 W max

(2) For the data rates < 200 Mb/s the setting for the lowest power consumption (i.e. lowest PLL and

Tx clock frequency) is assumed.

(3) The actual data flow has a negligible influence on the power consumption (i.e. very little

difference if NULLs or SpW packets are transferred).

All power figures in Table 11-1 are for maximum conditions, which means 3.6 V for the supply voltage.
If the supply voltage is lower the power consumption sinks as well. The reduction fits to the power
consumption with a resistive load. I.e. at 3.0 V the power consumption is 69.4% of the power
consumption at 3.6V.

The lowest power consumption at a certain data rate is achieved if the PLL is set to the lowest
possible frequency (setting of FEEDBDIV inputs) and the SpW Tx clock to the lowest possible
frequency (setting of TXDIV in register) for that SpW data rate.