Atec Agilent-16700 Series - Manual (Page 98)

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State (synchronous) analysis mode (continued) 300 Mb/s State Mode 600 Mb/s State Mode
Maximum state acquisition rate on each channel 300 Mb/s 600 Mb/s
Number of channels with time tags 68 * (number of modules) - 68 * (number of modules) - 35
on at full memory depth [5] (number of clocks) - 34
Number of data channels with time tags off 68 * (number of modules) - 68 * (number of modules) - 1
(number of clocks)
Maximum channels on a single time base and trigger 340 340
Memory depth [5] 16753A: 1 M samples 16753A: 1 M samples
16754A: 4 M samples 16754A: 4 M samples
16755A: 16 M samples 16755A: 16 M samples
16756A: 64 M samples 16756A: 64 M samples
Number of independent analyzers [6] 2 1
Number of clocks [7] 4 1
Number of clock qualifiers [7] 4 N/A
Minimum master to master clock time* [6] 3.33 ns 1.67 ns
Minimum master to slave clock time 1 ns N/A
Minimum slave to master clock time 1 ns N/A
Minimum slave to slave clock time 3.33 ns N/A
Minimum state clock pulse width, single edge 1 ns 500 ps
Minimum state clock pulse width, multiple edge 1 ns 1.67 ns
Clock qualifier setup time 500 ps N/A
Clock qualifier hold time 0 N/A
Time tag resolution 2 ns 1.5 ns
Maximum time count between stored states 32 days 32 days
Maximum state count 2E+32 2E+32
[1] Minimum eye width in system under test
[2] The choice of probe can limit system performance. Select a probe rated at 600 Mb/s or greater to maintain system bandwidth.
[3] Sample positions are independently adjustable for each data channel input. A negative sample position causes the input to be synchronously sampled by that amount before
each active clock edge. A positive sample position causes the input to be synchronously sampled by that amount after each active clock edge. A sampling position of zero
causes the input to be synchronously sampled coincident with each clock edge.
[4] Use of eye finder is recommended in 600 Mb/s mode
[5] With time or state tags on and all pods assigned, memory depth is half the maximum memory depth. With time or state tags on and one pod (34 channels) unassigned, the
memory depth is full.
[6] Independent analyzers may be either state or timing. When the 600 Mb/s state mode is selected, only one analyzer may be used.
[7] In the 300 Mb/s state mode, the total number of clocks and qualifiers is 4. All clock and qualifier inputs must be on the master module.
[8] Tested with input signal Vh = 0.9 V, Vl = -1.7 V, slew rate = 1 V/ns, threshold = -1.3 V
[9] Calculated from rise time
Items marked with an asterisk * are specifications. All others are characteristics.
"Typical" represents the average or median value of the parameter based on measurements from a significant number of units.
State/Timing Modules Specifications and
Characteristics
Agilent 16753A, 16754A, 16755A, 16756A
Supplemental Specifications* and Characteristics (continued)