Rainbow Electronics DS2182A - Manual (Page 7)

DS2182A
041995 7/22
CRCCR: CRC COUNT REGISTER Figure 5
(MSB) (LSB)
CRC7 CRC6 CRC5 CRC4 CRC3 CRC2 CRC1 CRC0
SYMBOL POSITION NAME AND DESCRIPTION
CRC7 CRCCR.7 MSB of CRC6 word error count
CRC0 CRCCR.0 LSB of CRC6 word error count
The CRC Count Register (CRCCR) is an 8-bit presetta-
ble counter that records word errors in the Cyclic Re-
dundancy Check (CRC). This 8-bit binary counter satu-
rates at 255 and generates an interrupt for each
occurrence after saturation if RIMR2.1 is set. The count in this register is only valid in the 193E framing mode
(RCR2.4 = 1) and is reset and disabled in the 193S fram-
ing mode (RCR2.4 = 0). The count is disabled during a
loss of sync condition (RLOS = 1).
OOFCR: OOF COUNT REGISTER Figure 6
(MSB) (LSB)
OOF7 OOF6 OOF5 OOF4 OOF3 OOF2 OOF1 OOF0
SYMBOL POSITION NAME AND DESCRIPTION
OOF7 OOFCR.7 MSB of OOF event count
OOF0 OOFCR.0 LSB of OOF event count
The OOF Count Register (OOFCR) is an 8-bit presetta-
ble counter that records Out Of Frame (OOF) events.
OOF events are defined by RCR1.5 and RCR1.6. This
8-bit counter saturates at 255 and generates an inter- rupt for each occurrence after saturation if RIMR2.2 is
set. The count is disabled during a loss of sync condi-
tion (RLOS = 1).
FECR: FRAME ERROR COUNT REGISTER Figure 7
(MSB) (LSB)
FE7 FE6 FE5 FE4 FE3 FE2 FE1 FE0
SYMBOL POSITION NAME AND DESCRIPTION
FE7 FECR.7 MSB of frame error count
FE0 FECR.0 LSB of frame error count
The Frame Error Count Register (FECR) is an 8-bit pre-
settable counter that records individual frame bit errors.
In the 193E mode (RCR2.4 = 1), the FECR records bit
errors in the FPS framing pattern (001011). In the 193S
mode (RCR2.4 = 0), the FECR records bit errors in both
the FT (101010) and FS (001110) framing patterns if RCR1.3 is set. If RCR1.3 is cleared, then the FECR only
records bit errors in the FT pattern. This 8-bit counter
saturates at 255 and generates an interrupt for each oc-
currence after saturation if RIMR2.3 is set. The count is
disabled during a loss of sync condition (RLOS = 1).