Rainbow Electronics T89C51CC01 - Manual (Page 95)

95
T89C51CC01
Rev. D – 17-Dec-01
Table 52. CANBT3 Register
CANBT3 (S:B6h)
CAN Bit Timing Registers 3
Note: The CAN controller bit timing registers must be accessed only if the CAN controller is dis-
abled with the ENA bit of the CANGCON register set to 0.
See Figure 35.
No default value after reset.
7 6 5 4 3 2 1 0
- PHS2 2 PHS2 1 PHS2 0 PHS1 2 PHS1 1 PHS1 0 SMP
Bit
Number
Bit
Mnemonic Description
7 -
Reserved
The value read from this bit is indeterminate. Do not set this bit.
6-4 PHS2 2:0
Phase segment 2
This phase is used to compensate for phase edge errors. This segment can be
shortened by the re-synchronization jump width.
3-1 PHS1 2:0
Phase segment 1
This phase is used to compensate for phase edge errors. This segment can be
lengthened by the re-synchronization jump width.
0 SMP
Sample type
0 - once, at the sample point.
1 - three times, the threefold sampling of the bus is the sample point and twice
over a distance of a 1/2 period of the Tscl. The result corresponds to the majority
decision of the three values.
Tphs2 = Tscl x (PHS2[2..0] + 1)
Tphs1 = Tscl x (PHS1[2..0] + 1)