Rainbow Electronics T89C51CC01 - Manual (Page 76)

76
T89C51CC01
Rev. D – 17-Dec-01
To enable an interrupt on general error:
• Enable General CAN IT in the interrupt system register,
• Enable interrupt on error, ENERG.
To enable an interrupt on Buffer-full condition:
• Enable General CAN IT in the interrupt system register,
• Enable interrupt on Buffer full, ENBUF.
To enable an interrupt when Timer overruns:
• Enable Overrun IT in the interrupt system register.
When an interrupt occurs, the corresponding message object bit is set in the SIT
register.
To acknowledge an interrupt, the corresponding CANSTCH bits (RXOK, TXOK,...) or
CANGIT bits (OVRTIM, OVRBUF,...), must be cleared by the software application.
When the CAN node is in transmission and detects a Form Error in its frame, a bit Error
will also be raised. Consequently, two consecutive interrupts can occur, both due to the
same error.
When a message object error occurs and is set in CANSTCH register, no general error
are set in CANGIE register.
15.5 Bit Timing and
BaudRate Figure 34. sample and transmission point
The baud rate selection is made by Tbit calculation:
Tbit = Tsyns + Tprs + Tphs1 + Tphs2
1. Tsyns = Tscl = (BRP[5..0]+ 1) / Fcan = 1TQ.
2. Tprs = (1 to 8) * Tscl = (PRS[2..0]+ 1) * Tscl
3. Tphs1 = (1 to 8) * Tscl = (PHS1[2..0]+ 1) * Tscl
4. Tphs2 = (1 to 8) * Tscl = (PHS2[2..0]+ 1) * Tscl
5. Tsjw = (1 to 4) * Tscl = (SJW[1..0]+ 1) * Tscl
The total number of Tscl (Time Quanta) in a bit time must be comprised between 8 to
25.
FCAN
CLOCK
Prescaler BRP
PRS 3-bit length
PHS1 3-bit length
PHS2 3-bit length
SJW 2-bit length
Bit Timing
System clock Tscl
Time Quantum
Sample point
Transmission point