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Eeprom data memory, 1 write data in the column latches, 2 programming – Rainbow Electronics T89C51CC01 User Manual

Page 28: 3 read data

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T89C51CC01

Rev. D – 17-Dec-01

8. EEPROM Data
Memory

The 2k byte on-chip EEPROM memory block is located at addresses 0000h to 07FFh of
the XRAM/ERAM memory space and is selected by setting control bits in the EECON
register. A read in the EEPROM memory is done with a MOVX instruction.

A physical write in the EEPROM memory is done in two steps: write data in the column
latches and transfer of all data latches into an EEPROM memory row (programming).

The number of data written on the page may vary from 1 up to 128 bytes (the page
size). When programming, only the data written in the column latch is programmed and
a ninth bit is used to obtain this feature. This provides the capability to program the
whole memory by bytes, by page or by a number of bytes in a page. Indeed, each ninth
bit is set when the writing the corresponding byte in a row and all these ninth bits are
reset after the writing of the complete EEPROM row.

8.1 Write Data in the
column latches

Data is written by byte to the column latches as for an external RAM memory. Out of the
11 address bits of the data pointer, the 4 MSBs are used for page selection (row) and 7
are used for byte selection. Between two EEPROM programming sessions, all the
addresses in the column latches must stay on the same page, meaning that the 4 MSB
must no be changed.

The following procedure is used to write to the column latches:

Save and disable interrupt.

Set bit EEE of EECON register

Load DPTR with the address to write

Store A register with the data to be written

Execute a MOVX @DPTR, A

If needed loop the three last instructions until the end of a 128 bytes page

Restore interrupt.

Note:

The last page address used when loading the column latch is the one used to select the
page programming address.

8.2 Programming

The EEPROM programming consists on the following actions:

writing one or more bytes of one page in the column latches. Normally, all bytes
must belong to the same page; if not, the first page address will be latched and the
others discarded.

launching programming by writing the control sequence (50h followed by A0h) to the
EECON register.

EEBUSY flag in EECON is then set by hardware to indicate that programming is in
progress and that the EEPROM segment is not available for reading.

The end of programming is indicated by a hardware clear of the EEBUSY flag.

Note:

The sequence 5xh and Axh must be executed without instructions between then other-
wise the programming is aborted.

8.3 Read Data

The following procedure is used to read the data stored in the EEPROM memory:

Save and disable interrupt

Set bit EEE of EECON register

Load DPTR with the address to read

Execute a MOVX A, @DPTR

Restore interrupt