Rainbow Electronics T89C51CC01 - Manual (Page 36)

36
T89C51CC01
Rev. D – 17-Dec-01
Table 10. Programming spaces
Note: The sequence 5xh and Axh must be executing without instructions between them other-
wise the programming is aborted.
Note: Interrupts that may occur during programming time must be disabled to avoid any spuri-
ous exit of the programming mode.
9.3.3 Status of the flash
memory The bit FBUSY in FCON register is used to indicate the status of programming.
FBUSY is set when programming is in progress.
9.3.4 Selecting FM1 The bit ENBOOT in AUXR1 register is used to map FM1 from F800h to FFFFh.
9.3.5 Loading the Column
Latches Any number of data from 1 byte to 128 bytes can be loaded in the column latches. This
provides the capability to program the whole memory by byte, by page or by any number
of bytes in a page.
When programming is launched, an automatic erase of the locations loaded in the col-
umn latches is first performed, then programming is effectively done. Thus no page or
block erase is needed and only the loaded data are programmed in the corresponding
page.
The following procedure is used to load the column latches and is summarized in
Figure 12:
• Disable interrupt and map the column latch space by setting FPS bit.
• Load the DPTR with the address to load.
• Load Accumulator register with the data to load.
• Execute the MOVX @DPTR, A instruction.
• If needed loop the three last instructions until the page is completely loaded.
• unmap the column latch and Enable Interrupt
Write to FCON
Operation FPL3:0 FPS FMOD1 FMOD0
User
5 X 0 0 No action
A X 0 0
Write the column latches in user
space
Extra Row
5 X 0 1 No action
A X 0 1
Write the column latches in extra row
space
Hardware
Security
Byte
5 X 1 0 No action
A X 1 0 Write the fuse bits space
Reserved
5 X 1 1 No action
A X 1 1 No action