Renesas R61509V - Manual (Page 56)

R61509V Target Spec
Rev. 0.11 April 25, 2008, page 56 of 181
Panel Interface Control 3 (R012h)
R/W RS IB15 IB14 IB13 IB12 IB11 IB10 IB9 IB8 IB7 IB6 IB5 IB4 IB3 IB2 IB1 IB0
R/W 1 0 0 0 0 0
VEQ
WI[2]
VEQ
WI[1]
VEQ
WI[0]
0 0 0 0 0
SEQ
WI[2]
SEQ
WI[1]
SEQ
WI[0]
Default value 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
VEQWI[2:0]: Sets VCOM equalize period. The VCOM equalize operation is executed from VCOM
alternating point defined by MCPI [2:0] for the period defined by VEQWI [2:0]. This function is disabled
when RGB interface is selected.
Table 26
VEQWI [2:0] VCOM Equalize period
3’h0 0 clocks
3’h1 1 clock
3’h2 2 clocks
3’h3 3 clocks
3’h4 4 clocks
3’h5 5 clocks
3’h6 6 clocks
3’h7 7 clocks
Note: The clock is the frequency divided clock, which is set by DIVI[[1:0] bits.
㪭㪚㪦㪤㩷㫆㫌㫋㫇㫌㫋
㩷
㩷
㪭㪜㪨㪮㪠㪲㪉㪑㪇㪴
㪞㪥㪛㩷㫃㪼㫍㪼㫃㩷
㪭㪜㪨㪮㪠㪲㪉㪑㪇㪴
㪭㪚㪠㩷㫃㪼㫍㪼㫃㩷 㩷
1) VEQW [2:0]=0h
㪭㪚㪦㪤㩷㫆㫌㫋㫇㫌㫋
2) VEQWI [2:0] ≠0h
Figure 6