RAD Data comm E1 Interface Converter RIC-E1 - Manual (Page 92)

RIC-E1 Installation and Operation Manual Appendix E IR-X.21B Interface Module
Selecting the IR-X.21B Timing E-3
IR-X.21B
RIC-E1 DTE
TXD TXD
TXC
ETC
ETC
RXC
RXD RXD
Signal Timing (RXC)
(2, 9)
(7, 14)
(4, 11)
(6, 13)
FIFO
Buffer
Rx
FIFO
Buffer
Tx
Figure E-4. EXT Timing Mode
INT/LBT Clock Mode
The INT/LBT clock mode is used in applications where the IR-X.21B side uses the
clock signal from the E1 link. This mode is used mainly when the attached
equipment has an X.21 interface, but no ability to produce clock signals. The
module has a 16-bit FIFO buffer to compensate for the phase delay introduced by
the X.21 device.
Figure E-5 illustrates the buffer connection and the flow of the
receive, transmit and clock signals.
When RIC-E1 operates in the internal or receive clock, you must set the IR-X.21B
JP2 jumper to INT/RCV.
IR-X.21B
RIC-E1 DTE
TXD TXD
TXC
RXC
RXD RXD
Signal Timing (RXC)
(2, 9)
(4, 11)
(6, 13)
FIFO
Buffer
Rx
FIFO
Buffer
Tx
Figure E-5. INT/LBT Timing Mode
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