Sun Microsystems Sun Fire V20z - Manual (Page 92)

B-2 Sun Fire V20z Server User Guide • March 2004
0E Initialize I/O component
0F Initialize the local bus IDE
10 Initialize power management
11 Load alternate registers with initial POST values
12 Restore CPU control word during warm boot
13 Initialize PCI bus mastering devices
14 Initialize keyboard controller
16 BIOS ROM checksum
17 Initialize cache before memory autosize
18 8254 programmable interrupt timer initialization
1A 8237 DMA controller initialization
1C Reset programmable interrupt controller
20 Test DRAM refresh
22 Test 8742 keyboard controller
24 Set ES segment register to 4GB
26 Enable gate A20 line
28 Autosize DRAM
29 Initialize POST memory manager
2A Clear 512KB base RAM
2C RAM failure on address line xxxx
2E RAM failure on data bits xxxx of low byte of memory bus
2F Enable cache before system BIOS shadow
30 RAM failure on data bits xxxx of high byte of memory
bus
32 Test CPU bus clock frequency
33 Initialize Phoenix Dispatch Manager
36 Warm start shut down
38 Shadow system BIOS ROM
3A Autosize cache
3C Advanced configuration of chipset registers
3D Load alternate registers with CMOS values
TABLE B-1 BIOS POST Codes (Continued)
Post Code Description