4 e1 mode, E1 m, Figure 12-20. receive-side timing – Maxim Integrated DS33R11 User Manual
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DS33R11 Ethernet Mapper with Integrated T1/E1/J1 Transceiver
308 of 344
12.4 E1
Mode
Figure 12-20. Receive-Side Timing
FRAME#
1
2
3
4
5
6
7
8
9
10
11
12 13
14
15
16
1
RSYNC
1
RSYNC
RFSYNC
2
NOTE 1: RSYNC IN FRAME MODE (TR.IOCR1.5 = 0).
NOTE 2: RSYNC IN MULTIFRAME MODE (TR.IOCR1.5 = 1).
NOTE 3: THIS DIAGRAM ASSUMES THE CAS MF BEGINS IN THE RAF FRAME.
Figure 12-21. Receive-Side Boundary Timing (with Elastic Store Disabled)
CHANNEL 32
CHANNEL 1
CHANNEL 2
CHANNEL 32
CHANNEL 1
CHANNEL 2
RCLKO
RSERO
RSYNC
RFSYNC
RSIG
RCHCLK
RCHBLK
1
C
D
A
LSB
MSB
A
B
Si
1
A Sa4 Sa5 Sa6 Sa7 Sa8
B
Note 4
NOTE 1: RCHBLK IS PROGRAMMED TO BLOCK CHANNEL 1.
NOTE 2: SHOWN IS A RNAF FRAME BOUNDARY.
NOTE 3: RSIG NORMALLY CONTAINS THE CAS MULTIFRAME ALIGNMENT NIBBLE (0000) IN CHANNEL 1.