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4 acronyms and glossary, Acronyms and glossary – Maxim Integrated DS33R11 User Manual

Page 18

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DS33R11 Ethernet Mapper with Integrated T1/E1/J1 Transceiver

18 of 344

4 ACRONYMS AND GLOSSARY


• BERT: Bit Error-Rate Tester
• DCE: Data Communication Interface
• DTE: Data Terminating Interface
• FCS: Frame Check Sequence
• HDLC: High-Level Data Link Control
• MAC: Media Access Control
• MII: Media Independent Interface
• RMII: Reduced Media Independent Interface
• WAN: Wide Area Network

Note 1:
Previous versions of this document used the term “Subscriber” to refer to the Ethernet Interface function.
The register names have been allowed to remain with a “SU.” prefix to avoid register renaming.

Note 2: Previous versions of this document used the term “Line” to refer to the Serial Interface. The register names
have been allowed to remain with a “LI.” prefix to avoid register renaming.

Note 3: The terms “Transmit Queue” and “Receive Queue” are with respect to the Ethernet Interface. The Receive
Queue is the queue for the data that arrives on the MII/RMII interface, is processed by the MAC and stored in the
SDRAM. Transmit queue is for data that arrives from the Serial port, is processed by the HDLC and stored in the
SDRAM to be sent to the MAC transmitter.
Note 4: This data sheet assumes a particular nomenclature of the T1 operating environment. In each 125

μs frame

there are 24 8-bit channels plus a framing bit. It is assumed that the framing bit is sent first followed by channel 1.
Each channel is made up of eight bits that are numbered 1 to 8. Bit number 1 is the MSB and is transmitted first.
Bit number 8 is the LSB and is transmitted last. The term “locked” is used to refer to two clock signals that are
phase- or frequency-locked or derived from a common clock (i.e., a 1.544MHz clock can be locked to a 2.048MHz
clock if they share the same 8kHz component). Throughout this data sheet, the following abbreviations are used:

B8ZS

Bipolar with 8 Zero Substitution

BOC Bit-Oriented

Code

CRC

Cyclical Redundancy Check

D4

Superframe (12 frames per multiframe) Multiframe Structure

ESF

Extended Superframe (24 frames per multiframe) Multiframe Structure

FDL

Facility Data Link

FPS

Framing Pattern Sequence in ESF

Fs

Signaling Framing Pattern in D4

Ft

Terminal Framing Pattern in D4

HDLC

High-Level Data Link Control

MF Multiframe

SLC–96

Subscriber Loop Carrier—96 Channels