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Diagnostic leds – Gateway Server E-9520T User Manual

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Troubleshooting

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Diagnostic LEDs

The BIOS sends a 1-byte hex code to port 80 prior to each POST task. These
codes are displayed on eight orange LEDs, located on the system board and
available at the back of the server chassis. They can provide troubleshooting
information in the event of a system hang during POST.

POST code checkpoints

The following table shows the checkpoints, LED codes, and task description of
events that may occur during the POST portion of the BIOS:

Power LED

Identify the
power state of
the system

Front panel

Blue

Off - Power is off (or S5)
On - Power is on (or S0)

Power supply
status LED

Identify power
supply fault

Power supply
module

Green or
Red

Green (On) - Power supply
good and receiving power
Red (On) - Power supply
fault
Off - Power supply not
receiving power

LED Name

Function

Location

Color

Description

Check

point

Description

03

Disable NMI, Parity, video for EGA, and DMA controllers. Initialize BIOS,
POST, Runtime data area. Also initialize BIOS modules on POST entry and
GPNV area. Initialized CMOS as mentioned in the Kernel Variable
“wCMOSFlags.”

04

Check CMOS diagnostic byte to determine if battery power is OK and
CMOS checksum is OK. Verify CMOS checksum manually by reading
storage area. If the CMOS checksum is bad, update CMOS with power-on
default values and clear passwords. Initialize status register A.
Initialize data variables that are based on CMOS setup questions. Initialize
both the 8259 compatible PICs in the system.

05

Initialize the interrupt controller in hardware (generally PIC) and interrupt
vector table.

06

Do R/W test to CH-2 count reg. Initialize CH-0 as system timer. Install the
POSTINT1Ch handler. Enable IRQ-0 in PIC for system timer interrupt.
Trap INT1Ch vector to “POSTINT1ChHandlerBlock.”

08

Initialize the CPU. The BAT test is being done on KBC. The keyboard
controller command byte is being programmed after Auto detection of
KB/MS using AMI KB-5.

C0

Early CPU Init Start — Disable Cache - Init Local APIC

C1

Set up boot strap processor information.

C2

Set up boot strap processor for POST.

C5

Enumerate and set up application processors.