Avago Technologies LSI53C140 - Manual (Page 76)

IX-2 Index
Ver. 2.1 Copyright © 1998–2001 by LSI Logic Corporation. All rights reserved.
E
electrical characteristics 3-11
electrostatic discharge 3-11
enable/disable SCSI transfers 3-9
ESD 3-11
F
filter edges 2-10
G
glitches 2-3
H
high voltage differential SCSI 1-7
HVD_MODE control signal polarity 2-12
hysteresis 2-7
hysteresis of SCSI receivers 3-19
I
input
capacitance 3-14
I/O pads 3-14
input pads 3-14
control signals 3-15
high voltage 3-14
low voltage 3-14
timing 3-21
voltage 3-11
voltage (TolerANT pins) 3-11
input current as a function of input voltage 3-20
input/output (SIO) 2-11
interface control pins 3-9
L
latch-up current 3-11
leading edge filter 2-8 , 2-10
load bus 2-7
LSI53C140 SCSI bus expander 1-1
LVD
DIFFSENS 2-5
driver SCSI signals 3-12
receiver SCSI signals 3-13
LVDlink 1-8
benefits 1-7 , 1-8
technology 2-4
transceivers 1-8 , 2-4
M
master reset 3-9
mechanical drawings 3-23
message (SMSG) 2-11
migration path 1-8
O
operating conditions 3-12
operating free air 3-12
output
control signals 3-16
high voltage 3-14
low voltage 3-14
timing 3-22
output current as a function of output voltage 3-20
P
parallel function 2-9 , 2-10
parity 2-3 , 2-7
PBGA 1-7
pin adjustments
board design B-1
pins
no connect B-2
power
on reset (POR) 2-13
PQFP 1-7
precision
delay control 2-1 , 2-4
pull-down 2-8 , 2-11
pull-up 2-8 , 2-11
pulse width 2-10
R
RBIAS 3-10
RC-type input filters 2-3
receiver latch 2-8
recovery 2-11
reliability issue 2-3
request 2-3
(SREQ) 2-10
reset (SRST) 2-9
RESET/ 2-13 , 3-9
control signal polarity 2-13
retiming 2-10
logic 2-1 , 2-5
rise and fall time test conditions 3-19
S
SACK 2-10
SCSI
bus protocol 2-5
I/O logic 2-11
parallel Interface-2 1-7
phases 2-4
signal descriptions 3-7
TolerANT technology 2-3
SCSI bus free state 2-14
SCSI enhanced parallel interface 1-7
SCSI input filtering 3-19
SCSI interface timing 3-21
select (SSEL) 2-8
server clustering 1-3
signal
descriptions 3-2
groupings 2-6
skew 2-2