Table 2.2 direction control signal polarity, 9 a and b hvd mode (a_hvd_mode and b_hvd_mode), Table 2.3 hvd_mode control signal polarities – Avago Technologies LSI53C140 User Manual
Page 30: A and b hvd mode (a_hvd_mode and b_hvd_mode), Direction control signal polarity, Hvd_mode control signal polarities

2-12
Functional Descriptions
Ver. 2.1
Copyright © 1998–2001 by LSI Logic Corporation. All rights reserved.
When the system selects SE mode due to the lack of HVD_MODE and
the correct DIFFSENS voltage, the plus signal leads are internally tied to
ground and the minus SCSI signals become the SE input/outputs.
When the system selects LVD mode due to the lack of HVD_MODE and
the correct DIFFSENS voltage, the plus and minus signal leads are
differential signal pairs.
2.2.9 A and B HVD Mode (A_HVD_MODE and B_HVD_MODE)
These inputs inform the LSI53C140 that external drivers and receivers
are used in this particular application. The effect of this control is to
disable the LVD and SE modes of operation from the corresponding port.
describes the HVD_MODE Control signal polarity.
2.2.10 A and B Differential Sense (A_DIFFSENS and B_DIFFSENS)
These control pins determine the mode of SCSI bus signaling that is
expected.
describes the Mode Sense Control voltage levels.
Table 2.2
Direction Control Signal Polarity
Signal Level
State
Effect
LOW = 0
Deasserted
Input signals into the LSI53C140.
HIGH = 1
Asserted
Drive the LSI53C140 signals onto the bus.
Table 2.3
HVD_MODE Control Signal Polarities
Signal Level
State
Effect
LOW = 0
Deasserted
LSI53C140 drivers function in SE or LVD mode.
HIGH = 1
Asserted
HVD signals and controls are enabled from the
port.