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Table 3.9 diffsens scsi signal, Table 3.10 input capacitance, Diffsens scsi signal – Avago Technologies LSI53C140 User Manual

Page 48: Input capacitance, Bidirectional scsi signals—a_sd[15:0

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3-14

LSI53C140 Specifications

Ver. 2.1

Copyright © 1998–2001 by LSI Logic Corporation. All rights reserved.

Table 3.9

DIFFSENS SCSI Signal

Symbol

Parameter

Min

Max

Unit Test Conditions

V

IH

HVD sense voltage

2.4

V

DD

+0.3

V

V

S

LVD sense voltage

0.7

1.9

V

V

IL

SE sense voltage

V

SS

0.3

0.5

V

I

IN

Input leakage

10

10

µ

A

V

PIN

= 0 V, 5.25 V

Table 3.10

Input Capacitance

Symbol

Parameter

Min

Max

Unit

Test

Conditions

C

I

Input capacitance of input pads

7

pF

C

IO

Input capacitance of I/O pads

10

pF

Table 3.11

Bidirectional SCSI Signals

A_SD[15:0]

±

, A_SDP[1:0]

±

,

A_SREQ

±

, A_SACK

±

, B_SD[15:0]

±

, B_SDP[1:0]

±

,

B_SREQ

±

, B_SACK

±

Symbol Parameter

Min

Max

Unit

Test

Conditions

V

IH

Input high voltage

2.0

V

DD

+0.3

V

V

IL

Input low voltage

V

SS

0.3

0.8

V

V

OH

1

1. TolerANT active negation enabled.

Output high voltage

2.0

V

DD

V

I

OH

= 7.0 mA

V

OL

Output low voltage

V

SS

0.5

V

48 mA

I

OZ

3-state leakage

20

20

µ

A

V

PIN

= 0 V, 3.47 V