Avago Technologies LSI53C140 - Manual (Page 55)

Electrical Characteristics 3-21
Ver. 2.1 Copyright © 1998–2001 by LSI Logic Corporation. All rights reserved.
3.2.3 AC Characteristics
The AC characteristics described in this section apply over the entire
range of operating conditions (refer to
Section 3.2.1, “DC
Characteristics” ). Chip timing is based on simulation at worst case
voltage, temperature, and processing. The LSI53C140 requires a
40 MHz clock input.
Table 3.16 and Figure 3.12 provide clock timing data.
Figure 3.12 Clock Timing
3.2.4 SCSI Interface Timing
Table 3.17 provides input timing data. Table 3.18 provides output timing
data. Figure 3.13 provides input/output timing data.
Table 3.16 Clock Timing
Symbol Parameter Min Max Units
t
1
Clock period 24.75 25.25 ns
t
2
Clock low time 10 15 ns
t
3
Clock high time 10 15 ns
t
4
Clock rise time 1 – V/ns
Clock
t
1
t
3
t
4
t
2
Table 3.17 Input Timing
Symbol Parameter Min Max Units
t
1
Input data setup 1 – ns
t
2
Input data hold 4.75 – ns
t
3
Input REQ/ACK assertion pulse width 11 – ns
t
4
Input REQ/ACK deassertion pulse width 11 – ns