Sundance SMT390-VP - Manual (Page 10)

Version 2.4 Page 10 of 55 SMT390-VP User Manual
Introduction
Overview
The SMT390-VP is a single width TIM, which converts 2 analogue signals into two
12-bit resolution digital data flows. Analogue to digital conversion is performed by two
Analog Devices AD9430s - they are 3.3-Volt 12-bit data CMOS devices that can
sample at up to 210 MSPS.
Digital data travel to a
Xilinx Virtex-II Pro FPGA (XC2VP30-6 - FF896 package),
controlled via ComPorts words. Samples are first stored into the on-board memory
and then transferred onto the Sundance High-speed Bus (
SHB ), common to a wide
range of Sundance products.
A copy of the data will also be streamed over the RocketIO Serial Links on the
module (
RSL
) in a future version. These interfaces are compatible with a wide range
of Sundance processor and I/O modules.
The FPGA is configured at power-up via Comport 3. The configuration process is
controlled by a microprocessor MSP430. Once the FPGA is configured, the
configuration ComPort becomes a control ComPort to set FPGA internal registers.
Module features
The main features of the SMT390-VP are listed below:
● Dual-ADC board,
● On-board low-jitter clock generation,
● 210 Mega Samples Per Second and per channel,
● 12-bit resolution,
● Two external clocks and two external triggers via MMCX (or MMBX – to be
specified on order) connectors,
● Two 64-MByte banks of DDR SDRAM for sample storage. Banks are
organised in 32-bit words.
● Two Standard Sundance ComPorts,
● Two SHB interfaces for easy interconnection to Sundance products,
● Two RSL (Rocket-IO Serial Link) interfaces for fast output transfers,
● All inputs are 50-Ohm terminated,
● On-board MSP430 microprocessor.
Power consumption
The SMT390-VP (SMT338-VP+SMT390) consumes about 9.57Watts (with data
acquisition running), and about 7.86Watts in idle state but after configuration of the
338VP).