beautypg.com

Altera Nios Development Board User Manual

Page 20

background image

1–12

Altera

Corporation

Nios Development Board Reference Manual, Stratix Edition

September 2004

Expansion Prototype Connector (PROTO1)

f

See the Altera web site for a list of available expansion daughter cards
that can be used with the Nios development board at
www.altera.com/devkits.

The expansion prototype connector interface includes:

41 I/O pins for prototyping. All 41 I/O pins connect to user I/O pins
on the Stratix device. Each signal passes through analog switches
(U19, U20, U21, U22 and U25) to protect the Stratix device from 5-V
logic levels. These analog switches are permanently enabled.

A buffered, zero-skew copy of the on-board OSC output from U2.

A buffered, zero-skew copy of the Stratix's phase-locked loop (PLL)-
output from U53.

A logic-negative power-on reset signal.

Five regulated 3.3-V power-supply pins (2A total max load for both
PROTO1 & PROTO2).

One regulated 5-V power-supply pin (1A total max load for both
PROTO1 & PROTO2).

Numerous ground connections.

The output logic-level on the expansion prototype connector pins is 3.3V.
The power supply included with the Nios II development kit cannot
supply the maximum load current specified above.

Figure 1–5

,

Figure 1–6

, and

Figure 1–7

show connections from the

PROTO1 expansion headers to the Stratix device. Unless otherwise noted,
labels indicate Stratix device pin numbers.