Fft ip core functional description, Fixed transform ffts, Variable streaming ffts – Altera FFT MegaCore Function User Manual
Page 24: Fft ip core functional description -1, Fixed transform ffts -1, Variable streaming ffts -1
FFT IP Core Functional Description
3
2014.12.15
UG-FFT
Fixed Transform FFTs
The buffered, burst, and streaming FFTs use a radix-4 decomposition, which divides the input sequence
recursively to form four-point sequences, requires only trivial multiplications in the four-point DFT.
Radix-4 gives the highest throughput decomposition, while requiring non-trivial complex multiplications
in the post-butterfly twiddle-factor rotations only. In cases where N is an odd power of two, the FFT
MegaCore automatically implements a radix-2 pass on the last pass to complete the transform.
To maintain a high signal-to-noise ratio throughout the transform computation, the fixed transform FFTs
use a block-floating-point architecture, which is a trade-off point between fixed-point and full-floating-
point architectures.
Related Information
Block Floating Point Scaling
Variable Streaming FFTs
The variable streaming FFTs use fixed-point data representation or the floating point representation.
If you select the fixed-point data representation, the FFT variation uses a radix 2
2
single delay feedback,
which is fully pipelined. If you select the floating point representation, the FFT variation uses a mixed
radix-4/2. For a length N transform, log
4
(N) stages are concatenated together. The radix 2
2
algorithm has
the same multiplicative complexity of a fully pipelined radix-4 FFT, but the butterfly unit retains a radix-2
FFT. The radix-4/2 algorithm combines radix-4 and radix-2 FFTs to achieve the computational advantage
of the radix-4 algorithm while supporting FFT computation with a wider range of transform lengths. The
butterfly units use the DIF decomposition.
Fixed point representation allows for natural word growth through the pipeline. The maximum growth of
each stage is 2 bits. After the complex multiplication the data is rounded down to the expanded data size
using convergent rounding. The overall bit growth is less than or equal to log
2
(N)+1.
The floating point internal data representation is single-precision floating-point (32-bit, IEEE 754
representation). Floating-point operations provide more precise computation results but are costly in
hardware resources. To reduce the amount of logic required for floating point operations, the variable
streaming FFT uses fused floating point kernels. The reduction in logic occurs by fusing together several
floating point operations and reducing the number of normalizations that need to occur.
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