Altera FFT MegaCore Function User Manual
Page 13
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Device
Parameters
ALM
DSP
Blocks
Memory
Registers
f
MAX
(MHz)
Type
Length
Engines
M10K M20K Primar
y
Secondar
y
Strati
x V
Burst
Single
Output
1,024
1
652
2
--
4
1,553
111
50
0
Strati
x V
Burst
Single
Output
1,024
2
1,011
4
--
8
2,687
149
47
6
Strati
x V
Burst
Single
Output
256
1
621
2
--
3
1,502
132
50
0
Strati
x V
Burst
Single
Output
256
2
978
4
--
8
2,555
173
50
0
Strati
x V
Burst
Single
Output
4,096
1
681
2
--
9
1,589
149
50
0
Strati
x V
Burst
Single
Output
4,096
2
1,039
4
--
14
2,755
161
47
6
Strati
x V
Streaming 1,024
—
1,896
6
--
20
4,814
144
49
0
Strati
x V
Streaming 256
—
1,604
6
--
20
4,062
99
44
9
Strati
x V
Streaming 4,096
—
1,866
6
--
38
4,889
118
46
1
Strati
x V
Variable
Streaming
Floating
Point
1,024
—
11,607 32
--
87
19,031 974
35
5
Strati
x V
Variable
Streaming
Floating
Point
256
—
8,850
24
--
59
15,297 820
37
4
Strati
x V
Variable
Streaming
Floating
Point
4,096
—
14,335 40
--
115
22,839 1,047
32
5
Strati
x V
Variable
Streaming
1,024
—
2,334
14
--
13
5,623
201
38
2
Strati
x V
Variable
Streaming
256
—
1,801
10
--
8
4,443
174
36
5
1-10
Performance and Resource Utilization
UG-FFT
2014.12.15
Altera Corporation
About This IP Core
- MAX 10 JTAG (15 pages)
- MAX 10 Power (21 pages)
- Unique Chip ID (12 pages)
- Remote Update IP Core (43 pages)
- Device-Specific Power Delivery Network (28 pages)
- Device-Specific Power Delivery Network (32 pages)
- Hybrid Memory Cube Controller (69 pages)
- ALTDQ_DQS IP (117 pages)
- MAX 10 Embedded Memory (71 pages)
- MAX 10 Embedded Multipliers (37 pages)
- MAX 10 Clocking and PLL (86 pages)
- MAX 10 FPGA (26 pages)
- MAX 10 FPGA (56 pages)
- USB-Blaster II (22 pages)
- GPIO (22 pages)
- LVDS SERDES (27 pages)
- User Flash Memory (33 pages)
- ALTDQ_DQS2 (100 pages)
- Avalon Tri-State Conduit Components (18 pages)
- Cyclone V Avalon-MM (166 pages)
- Cyclone III FPGA Starter Kit (36 pages)
- Cyclone V Avalon-ST (248 pages)
- Stratix V Avalon-ST (286 pages)
- Stratix V Avalon-ST (293 pages)
- DDR3 SDRAM High-Performance Controller and ALTMEMPHY IP (10 pages)
- Arria 10 Avalon-ST (275 pages)
- Avalon Verification IP Suite (224 pages)
- Avalon Verification IP Suite (178 pages)
- DDR2 SDRAM High-Performance Controllers and ALTMEMPHY IP (140 pages)
- Floating-Point (157 pages)
- Integer Arithmetic IP (157 pages)
- Embedded Peripherals IP (336 pages)
- JESD204B IP (158 pages)
- Low Latency Ethernet 10G MAC (109 pages)
- LVDS SERDES Transmitter / Receiver (72 pages)
- Nios II Embedded Evaluation Kit Cyclone III Edition (3 pages)
- Nios II Embedded Evaluation Kit Cyclone III Edition (80 pages)
- IP Compiler for PCI Express (372 pages)
- Parallel Flash Loader IP (57 pages)
- Nios II C2H Compiler (138 pages)
- RAM-Based Shift Register (26 pages)
- RAM Initializer (36 pages)
- Phase-Locked Loop Reconfiguration IP Core (51 pages)
- DCFIFO (28 pages)