Rockwell Automation T8442 Trusted TMR Speed Monitor - Manual (Page 15)

Trusted
TM
Module T8442
Issue 8 Apr 10 PD-T8442 15
The quad-redundant relay architecture provides fault tolerant control of the volt-free output and allows
a single relay to be tested without disturbing the load. ISENSE and CONTACT data from the SOFTA
is analysed to determine if each relay is operable and if a load is connected (de-energise to trip only).
ISENSE is an analogue signal that represents the load current in each relay leg (of the quad-voted
output). CONTACT is a digital signal that pulses during a change of state of any relay within a speed
group. ISENSE and CONTACT are processed via dual-redundant circuits. The relay circuits are
powered via dual-redundant 24V dc field power, and dual-redundant ±15V dc power is provided to the
current sensors on the SOFTA.
The triple-redundant speed input architecture provides fault tolerant sensing of rotational speed and
acceleration. These circuits receive transformer-coupled power from their associated SFIU quadrant.
A test enable from the SFIA causes the speed input to enter self-test mode.
1.3.1. SFIU
The SFIU assembly contains the following circuits:
Resistor Isolation. The interface to the HIU contains resistor isolation to limit the current flow between
TMR/QUAD fault containment regions during a power transition or over-voltage fault.
SFIA (Speed Field Interface ASIC) & Power Circuits. The SFIA votes and processes HIU command
packets and distributes response packets to all three HIU slices. Decoded coil commands are
provided to the relay drive circuits. Relay monitor data and speed input data are processed and
provided to the HIU. The power circuits provide fault tolerant ORed HIU power for the SFIA and
isolated power for the pulse detectors.
Galvanic Isolation. The SFIU provides a 2500V galvanic isolation barrier between the SFIA and the
field circuits for power and digital signals.
Pulse Detectors. The pulse detectors provide signal conditioning (amplification and threshold
detection) for the speed input signals. Each pulse detector is able to replace its speed input signal with
a test excitation signal when commanded by the SFIA.
Relay Drives. The relay drive circuits provide the interface between the SFIA and the 24V dc relay
coils. Each drive circuit provides a diagnostic signal back to the SFIA, indicating the status of the relay
coil.
1.3.2. SFTU
The SFTU assembly contains the following circuits.
ISENSE Power. These circuits convert the dual-redundant 24 Vdc field power into dual-redundant ±15
Vdc power for the current sensors on the SOFTA.
Fused Power. These circuits provide independent wire-ORed and fused 24 Vdc power to each of the
relay drive quadrants and the two relay monitor quadrants.
Relay Monitors. These circuits provide dual-redundant multiplexing and signal encoding for the
ISENSE and CONTACT signals, 24 Vdc field power monitor, and ±15 Vdc ISENSE power monitor.
The encoded data is provided to the SFIA.
Field Connector. The field connector provides the external interface to the SIFTA and SOFTA(s).