Cirrus Logic CS8416 - Manual (Page 47)

DS578F3 47
CS8416
each mode, every start-up option select pin (except for TX, which has an internal pull-down) MUST have an
external pull-up or pull-down resistor as there are no internal pull-up or pull-down resistors for these startup
conditions (set after reset).
15.3 Hardware Mode Equivalent Register Settings
Listed below are the equivalent values that the registers are set to in Hardware Mode.
Control0 Register (00h)
FSWCLK = 0
PDUR = Set by TX pin pull-up/down after reset.
TRUNC = 0
Control1 Register (01h)
SWCLK = Set to 1 if there a transition on OMCK after reset. Otherwise set to 0.
MUTSAO = 0
INT[1:0] = N/A.
HOLD[1:0] = 00
RMCKF = Set by U pin pull-up/down after reset.
CHS = 0
Control2 Register (02h)
DETCI = N/A
EMPH_CNTL[2] = set by 96KHZ pull-up/down after reset. See Figure 14 for the de-emphasis filter re-
sponse.
EMPH_CNTL[1:0] = 00
GPO0SEL[3:0] = N/A
Control3 Register (03h)
GPO1SEL[3:0] = N/A
GPO2SEL[3:0] = N/A
Pin Name Pull Down to DGND Function Pull Up to VL Function
SDOUT Hardware Mode Software Mode
RCBL Serial Port Slave Mode Serial Port Master Mode
AUDIO Serial Format Select 1 (SFSEL1)=0 Serial Format Select 1 (SFSEL1)=1
C Serial Format Select 0 (SFSEL0)=0 Serial Format Select 0 (SFSEL0)=1
U RMCK Frequency=256*F
s
RMCK Frequency=128*F
s
TX Normal Phase Detector update rate. Higher Phase Detector update rate.
96KHZ Emphasis Audio Match Off Emphasis Audio Match On
NV/RERR NVERR Selected RERR Selected
Table 4. Hardware Mode Start-Up Pin Conditions