Cirrus Logic CS8416 - Manual (Page 4)

4 DS578F3
CS8416
14.4 Control2 (02h) ............................................................................................................................. 38
14.5 Control3 (03h) ............................................................................................................................. 39
14.6 Control4 (04h) ............................................................................................................................. 39
14.7 Serial Audio Data Format (05h) ................................................................................................... 40
14.8 Receiver Error Mask (06h) ......................................................................................................... 41
14.9 Interrupt Mask (07h) .................................................................................................................... 41
14.10 Interrupt Mode MSB (08h) and Interrupt Mode LSB(09h) ......................................................... 41
14.11 Receiver Channel Status (0Ah) ................................................................................................ 42
14.12 Format Detect Status (0Bh) ....................................................................................................... 42
14.13 Receiver Error (0Ch) ................................................................................................................ 43
14.14 Interrupt 1 Status (0Dh) ............................................................................................................ 44
14.15 Q-Channel Subcode (0Eh - 17h) ............................................................................................... 44
14.16 OMCK/RMCK Ratio (18h) ....................................................................................................... 45
14.17 Channel Status Registers (19h - 22h) ....................................................................................... 45
14.18 IEC61937 PC/PD Burst Preamble (23h - 26h) .......................................................................... 45
14.19 CS8416 I.D. and Version Register (7Fh) ................................................................................... 45
15. HARDWARE MODE .......................................................................................................................... 46
15.1 Serial Audio Port Formats ........................................................................................................... 46
15.2 Hardware Mode Function Selection ............................................................................................ 46
15.3 Hardware Mode Equivalent Register Settings ............................................................................. 47
16. EXTERNAL AES3/SPDIF/IEC60958 RECEIVER COMPONENTS ................................................... 49
16.1 AES3 Receiver External Components ........................................................................................ 49
16.2 Isolating Transformer Requirements ........................................................................................... 49
17. CHANNEL STATUS BUFFER MANAGEMENT ............................................................................... 51
17.1 AES3 Channel Status (C) Bit Management ................................................................................ 51
17.2 Accessing the E Buffer ................................................................................................................ 51
17.2.1 Serial Copy Management System (SCMS) ...................................................................... 51
18. PLL FILTER ....................................................................................................................................... 53
18.1 General ........................................................................................................................................ 53
18.2 External Filter Components ......................................................................................................... 53
18.2.1 General ............................................................................................................................. 53
18.2.2 Capacitor Selection .......................................................................................................... 54
18.2.3 Circuit Board Layout ......................................................................................................... 54
18.2.4 Component Value Selection ............................................................................................. 54
18.2.5 Jitter Attenuation ............................................................................................................... 55
19. PACKAGE DIMENSIONS ................................................................................................................. 56
TSSOP THERMAL CHARACTERISTICS............................................................................................. 57
QFN THERMAL CHARACTERISTICS ................................................................................................. 58
20. ORDERING INFORMATION ............................................................................................................. 59
21. REVISION HISTORY ......................................................................................................................... 60