beautypg.com

Pin description - software mode, 1 tssop pin description – Cirrus Logic CS8416 User Manual

Page 12

background image

12

DS578F3

CS8416

2. PIN DESCRIPTION - SOFTWARE MODE

2.1

TSSOP Pin Description

Pin

Name

Pin #

Pin Description

VA

6

Analog Power (Input) - Analog power supply. Nominally +3.3 V. This supply should have as little noise
as possible since noise on this pin will directly affect the jitter performance of the recovered clock

VD

23

Digital Power (Input) – Digital core power supply. Nominally +3.3 V

VL

21

Logic Power (Input) – Input/Output power supply. Nominally +3.3 V or +5.0 V

AGND

7

Analog Ground (Input) - Ground for the analog circuitry in the chip. AGND and DGND should be con-
nected to a common ground area under the chip.

DGND

22

Digital & I/O Ground (Input) - Ground for the I/O and core logic. AGND and DGND should be connected
to a common ground area under the chip.

RST

9

Reset (Input) - When RST is low, the CS8416 enters a low power mode and all internal states are reset.
On initial power up, RST must be held low until the power supply is stable, and all input clocks are stable
in frequency and phase.

FILT

8

PLL Loop Filter (Output) - An RC network should be connected between this pin and analog ground.
For minimum PLL jitter, return the ground end of the filter network directly to AGND. See

“PLL Filter” on

page 53

for more information on the PLL and the external components.

RXP0
RXP1
RXP2
RXP3
RXP4
RXP5
RXP6
RXP7

4
3
2
1

10

11

12
13

Positive AES3/SPDIF Input (Input) - Single-ended or differential receiver inputs carrying AES3 or
S/PDIF encoded digital data. The RXP[7:0] inputs comprise the 8:2 S/PDIF Input Multiplexer. The select
line control is accessed using the Control 4 register (04h). Unused multiplexer inputs should be left float-
ing or tied to AGND. See

“External AES3/SPDIF/IEC60958 Receiver Components” on page 49

for rec-

ommended input circuits.

RXP3

OLRCK

RXP2

OSCLK

RXP1

SDOUT

RXP0

OMCK

RXN

RMCK

VA

VD

AGND

DGND

FILT

VL

RST

GPO0

RXP4

GPO1

RXP5

AD2 / GPO2

RXP6

SDA / CDOUT

RXP7

SCL / CCLK

AD0 / CS

AD1 / CDIN

1
2
3
4
5
6
7
8

21

22

23

24

25

26

27

28

9
10
11
12

17

18

19

20

13
14

15

16

Top-Down View

28-pin SOIC/TSSOP

Package