beautypg.com

Cs5490 – Cirrus Logic CS5490 User Manual

Page 30

background image

CS5490

30

DS982F3

6.4 Software Registers Summary (Page 17)

Address

2

RA[5:0]

Name

Description

1

DSP

3

HOST

3

Default

0*

00 0000

VSag

DUR

V Sag Duration

Y

Y

0x 00 0000

1*

00 0001

VSag

Level

V Sag Level

Y

Y

0x 00 0000

2

00 0010

-

Reserved

-

3

00 0011

-

Reserved

-

4*

00 0100

IOver

DUR

I Overcurrent Duration

Y

Y

0x 00 0000

5*

00 0101

IOver

LEVEL

I Overcurrent Level

Y

Y

0x 7F FFFF

6

00 0110

-

Reserved

-

7

00 0111

-

Reserved

-

8*

00 1000

-

Reserved

-

9*

00 1001

-

Reserved

-

10

00 1010

-

Reserved

-

11

00 1011

-

Reserved

-

12*

00 1100

-

Reserved

-

13*

00 1101

-

Reserved

-

14

00 1110

-

Reserved

-

15

00 1111

-

Reserved

-

16

01 0000

-

Reserved

-

17

01 0001

-

Reserved

-

18

01 0010

-

Reserved

-

19

01 0011

-

Reserved

-

20

01 0100

-

Reserved

-

21

01 0101

-

Reserved

-

22

01 0110

-

Reserved

-

23

01 0111

-

Reserved

-

24

01 1000

-

Reserved

-

25

01 1001

-

Reserved

-

26

01 1010

-

Reserved

-

27

01 1011

-

Reserved

-

28

01 1100

-

Reserved

-

29

01 1101

-

Reserved

-

30

01 1110

-

Reserved

-

31

01 1111

-

Reserved

-

Notes: (1)

Warning:

Do not write to unpublished or reserved register locations.

(2) * Registers with checksum protection.

(3) Registers that can be set to write protect from DSP and/or HOST.