Cirrus Logic CS5490 - Manual (Page 25)

CS5490
DS982F3 25
6.1.3 Checksum
To improve the communication reliability on the serial
interface, the CS5490 provides a checksum mechanism
on transmitted and received signals. Checksum is
disabled by default but can be enabled by setting the
appropriate bit in the SerialCtrl register. When enabled,
both host and CS5490 are expected to send one
additional checksum byte after the normal command
byte and applicable 3-byte register data have been
transmitted.
The checksum is calculated by subtracting each
transmit byte from 0xFF. Any overflow is truncated and
the result wraps. The CS5490 executes the command
only if the checksum transmitted by the host matches
the checksum calculated locally. Otherwise, it sets a
status bit (RX_CSUM_ERR in Status0 register), ignores
the command, and clears the serial interface in
preparation for the next transmission.
Figure 18. Byte Sequence for Checksum
6.1.4 Serial Time Out
In case a transaction from the host is not completed (for
example, a data byte is missing in a register write), a
time out circuit will reset the interface after 128ms. This
will require that each byte be sent from the host within
128ms of the previous byte.
RX Checksum Page Select Cmd.
TX
RX CHECKSUM
DATA DATA DATA CHECKSUM
Read Cmd.
RX DATA DATA DATA CHECKSUM Write Cmd.
RX Checksum Instruction
Page Select
Instruction
Read Command
Write Command