Cirrus Logic CS4234 - Manual (Page 79)

DS899F1 79
CS4234
12.REVISION HISTORY
Release Changes
F1 – Added left justified and I 2 S serial ports to system features on front page.
– Renamed the FS pin to FS/LRCK throughout.
– Renamed the SDOUT pin to SDOUT1 throughout and updated the SDOUT1 pin description in
Section 1 to
include in left justified and I²S modes.
– Renamed the AD2 pin to AD2/SDOUT2 throughout and updated the pin description in Section 1 to reflect
the combined functionality of the input/output pin, and updated figures throughout to show as bidirectional
signal.
– Changed SCLK from “Input” to “Input/Output” in pin description in Section 1 .
– Updated Section 1.1 to reflect the pin name changes.
– Updated “Switching Characteristics - Serial Audio Interface” on page 18 to include slave and master modes.
– Added Figure 6. TDM Serial Audio Interface Timing and Figure 7. PCM Serial Audio Interface Timing .
– Updated Section 4.4 for master/slave mode and left justified/I²S mode functionality.
– Added Section 4.5.2 Left Justified and I²S Modes .
– Added left justified and I²S mode data routing description to Section 4.6.1.1 ADC Signal Routing and Section
4.6.1.2 DAC1-4, DAC5, and Low-latency Signal Routing .
– Added I 2 S and left-justified options SP_FORMAT field (reg 08h bits 3:2) in Section 6.5.3 Serial Port Format
– Added MASTER/SLAVE bit (reg 08h bit 0) to Section 5. Register Quick Reference and Section 6.5 Serial
Port Control (Address 08h) and added description, Section 6.5.5 Master / Slave .
– Updated PSRR specification in the Analog Input Characteristics table.
– Removed note about ADC CM bits in the Analog Input Characteristics table.
– Added analog input pins must be externally biased in Section 4.6.2.1 .
– Changed ADC CM bits to reserved in Section 5 and Section 6.6 .
– Changed references to PA117 to CS44417 throughout.
Contacting Cirrus Logic Support
For all product questions and inquiries, contact a Cirrus Logic Sales Representative.
To find one nearest you, go to
www.cirrus.com.
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