Rainbow Electronics ISD5216 - Manual (Page 73)

I5216 SERIES
Advanced Information
PRELIMINARY
Publication Release Date: November 30, 2001
- 73 Revision A1
I
2
S SERIAL INTERFACE TECHNICAL INFORMATION
THE I
2
BUS
As shown in the following figure, the bus has three lines:
• continuous serial clock (SCK)
• word select (WS)
• serial data (SD)and the device generating SCK and WS is the master.
Simple System Configurations and Basic Interface Timing
SERIAL DATA
Serial data is transmitted in two’s complement with the MSB first. The MSB is transmitted first because
the transmitter and receiver may have different word lengths. It isn’t necessary for the transmitter to
know how many bits the receiver can handle, nor does the receiver need to know how many bits are
being transmitted.
When the system word length is greater than the transmitter word length, the word is truncated (least
significant data bits are set to ‘0’) for data transmission. If the receiver is sent more bits than its word
length, the bits after the LSB are ignored. On the other hand, if the receiver is sent fewer bits than its
word length, the missing bits are set to zero internally. And so, the MSB has a fixed position, whereas
the position of the LSB depends on the word length. The transmitter always sends the MSB of the next
word one clock period after the WS changes.