I5216 series, Preliminary – Rainbow Electronics ISD5216 User Manual
Page 68
I5216 SERIES
Advanced Information
PRELIMINARY
Publication Release Date: November 30, 2001
- 68
Revision A1
PCM PARAMETERS
PARAMETER
SYMBOL CONDITIONS MIN. TYP.
MAX.
UNIT
Bit Clock Frequency
1/T
SCK
SCK 64
---
3072
kHz
Bit Clock Duty Cycle
D
C
SCK
---
50
---
%
Word Sync. Frequency
1/T
WSl
WS @ low rate
---
8000
---
Hertz
Word Sync. Frequency
1/T
WSh
WS @ high rate
44.1
---
48
kHz
Rise Time
T
IR
SCK,SDI,SDIO,WS
--- --- 50
nsec
Fall Time
T
IF
SCK,SDI,SDIO,WS
--- --- 50
nsec
Hold Time for 2
nd
cycle
of Bit clock
T
HLD
SCK low to WS
low
50 --- ---
nsec
Transmit Sync. Timing
T
XS
T
SX
SCK to WS
WS to SCK
20
100
---
---
---
---
nsec
nsec
Receive Sync. Timing
T
RS
T
SR
SCK to WS
WS to SCK
20
100
---
---
---
---
nsec
nsec
Setup Time for SDI valid
T
STSDI
--- 20
---
---
nsec
Hold Time for SDI valid
T
HDSDI
--- 50
---
---
nsec
Output Delay Time for
SDIO valid
T
DV
SCK to SDIO
10
---
120
nsec
Output Delay Time for
SDIO High Impedance
T
DHI
SCK to SDIO
10
---
120
nsec