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Main processor (mp) – NEC NEAX 2000 IPS User Manual

Page 52

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NEAX 2000 IPS Configuration Guide

Page 42

NDA-24347, Issue 1

Common Control Cards

Chapter 4 Circuit Cards

Main Processor
(MP)

Major specifications and functionality of the MP are shown below:

Central Processing

ElanSC520

System Memory

Flash ROM (8 MB), SDRAM (32 MB)

Network Switching

1,024 x 1,024 Time Division Switch

Note 1

MAT Interface

Two RS-232C ports
Number 0 Port: Direct Connection
Number 1 Port: Remote Connection

Note 2

3-way Conference

16 sets of 3-way conference circuitry

DTMF Signal Sender

32 circuits (digit 0 to 9, *, and # are generated)

Music-on-Hold

Two types are available
(Melody or External Source)

Audible Tone Generator (DTG)

Phase Locked Oscillator (PLO)

Two ports (Source/Receiver)

Built-in SMDR

Built-in MCI

BS00 Function

DTMF Receiver

Four circuits

DAT x 2 circuits (120 seconds per circuit)

DK00 x 2 circuits (relay drive x 1, external key scan x 1)

AP01 Function

Built-in Device Registration Server (DRS)

Note 1:

Refer to the

Figure 4-2

for the port allocation of the Time Division Switch.

Note 2:

Number 1 Port includes a built-in modem for a remote connection of the MAT.

NAME CODE

PART

NUMBER

REMARKS

8-Seat License

150641

Licenses for 8 Dterm IP telephones

16-Seat License

150642

Licenses for 16 Dterm IP telephones

32-Seat License

150643

Licenses for 32 Dterm IP telephones

64-Seat License

150644

Licenses for 64 Dterm IP telephones

128-Seat License

150645

Licenses for 128 Dterm IP telephones

256-Seat License

150646

Licenses for 256 Dterm IP telephones