Motorola ATCA-717 - Manual (Page 117)

FPGA Devices’ Features and Data Paths
PENT/ATCA−717 117
During a hard reset all internal registers, state machines and caches of the CPU are reset.
Furthermore all on−board PCI devices as well as the host bridge are reset.
a
During a soft reset the CPU is reset, with the exception of the internal caches and state
machines
aaa
Reset Sources
The following table lists all possible reset sources and the corresponding reset types. aaa
Table 10: Reset Sources
Reset Source Hard Reset Soft Reset
Software reset x x
Watchdog inside Southbridge x
Power−up reset x
Face plate reset key x
RTM reset x
IPMC reset x
Keyboard reset x
Interrupt Routing Unit
The FPGA is used for fixed interrupt routing on the blade. a
All interrupts from PCI devices are routed via the FPGA to the South Bridge. All other
interrupts are routed to the Super I/O device from where they are routed to the South
Bridge.
a
Miscellaneous Glue Logic
The miscellaneous glue logic includes:
S Serial interface
S Reset mask and source register
S Flash control register
S PMC status register
S Shut−down register