Motorola ATCA-717 - Manual (Page 108)

Devices’ Features and Data Paths South Bridge
108 PENT/ATCA−717
South Bridge
The used South Bridge is an Intel 6300ESB I/O controller hub device. It provides the
interface between the Host Bridge and the legacy I/O. Integrated into the South Bridge
are:
aa
S Two 8237 DMA controllers
S One 8254 counter timer
S Interrupt controller
S Real−time clock
S Watchdog
The interfaces provided by the South Bridge include:
a
S Hub interface 1.5
S PCI 2.2 interface
S PCI−X 1.0 interface
S Two parallel ATA interfaces
S Two serial ATA interfaces
S Two serial RS−232 interfaces
S Four USB interfaces
S LPC interface
S SMBus interface
Interrupt Controller
The interrupt controller residing in the South Bridge is 8259A−compliant and runs in PIC
mode.
a
The interrupts of the four PMC slots are merged and are routed through an FPGA to the
interrupt controller where they are mapped to ISA compatible interrupts.
a
The interrupt controller is also able to generate CPU Non−Maskable Interrupts (NMIs).
Possible sources of NMIs are:
aa
S Memory ECC and parity errors