Zilog Z8F0130 - Manual (Page 92)

eZ8
™
CPU Core
User Manual
UM012820-0810 ADCX Instruction
77
ADCX
Definition
Add with Carry using Extended Addressing.
Syntax
ADCX dst, src
Operation
dst
 dst + src + C
Description
For this new eZ8 extended addressing instruction, add the source operand
and the Carry (C) flag to the destination operand. Perform two’s-comple-
ment addition. Store the sum in the destination operand. The contents of
the source operand are not affected. In multiple-precision (multibyte)
arithmetic, this instruction permits the carry from the addition of low-
order byte operations to be carried into the addition of high-order bytes.
The destination and source operands use 12-bit addresses to access any
address in the Register File.
Flags
C Set if there is a carry from bit 7; reset otherwise
Z Set if the result is zero; reset otherwise
S Set if the result is negative; reset otherwise
V Set if an arithmetic overflow occurs; reset otherwise
D Reset to 0
H Set if there is a carry from bit 3 of the result; reset otherwise