Zilog Z8F0130 - Manual (Page 36)

eZ8
™
CPU Core
User Manual
UM012820-0810 Address Space
21
Because Working Registers can be specified using fewer operand bytes,
there are fewer bytes of code needed, which reduces execution time. In
addition, when processing interrupts or changing tasks, the Register
Pointer speeds context switching. The Set Register Pointer (SRP)
instruction sets the contents of the Register Pointer.
16-Bit Register Pairs
Register data may be accessed as a 16-bit word using Register Pairs. In
this case, the most significant byte (MSB) of the data is stored in the even
numbered register, while the least significant byte (LSB) is stored in the
next higher odd numbered register (see
Figure 5 on page 22). Address the
register pair using the address of the MSB.
Figure 4. Working Register Addressing Example
0 1 1 1 0 0 1 1
Register Pointer
0 1 1 0 1 1 1 0
INC R6
0 1 1 1 0 1 1 0
Bit
0
Bit
7
0 0 1 1
Full 12-bit Register Address (376h)
Bit
11 Bit
0
Working Group Page
Working Register
4-bit Address