Zilog Z8F0130 - Manual (Page 262)

eZ8
™
CPU Core
User Manual
UM012820-0810 TMX Instruction
247
TMX
Definition
Test Under Mask using Extended Addressing.
Syntax
TMX dst, src
Operation
dst AND src
Description
This new eZ8 extended addressing instruction tests selected bits in the
destination operand for a logical 0 value. Specify the bits to be tested by
setting a 1 bit in the corresponding bit position in the source operand (the
mask). The TMX instruction AND’s the destination with the source oper-
and (mask). Check the Zero flag to determine the result. If the Z flag is
set, the tested bits are 0. When a TMX operation is completed, the desti-
nation and source operands retain their original values.
Flags
C Unaffected
Z Set if the result is zero; reset otherwise
S Set if the result is negative; reset otherwise
V Reset to 0
D Unaffected
H Unaffected