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Zilog Z8F0130 User Manual

Page 79

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eZ8

CPU Core

User Manual

UM012820-0810

eZ8

CPU Instruction Set Summary

64

LD dst, src

dst

 src

r

IM

0C–FC – – – – – –

2

2

r

X(r)

C7

3

3

X(r)

r

D7

3

4

r

Ir

E3

2

3

R

R

E4

3

2

R

IR

E5

3

3

R

IM

E6

3

2

IR

IM

E7

3

3

Ir

r

F3

2

3

IR

R

F5

3

3

LDC dst, src dst

 src

r

Irr

C2

– – – – – –

2

5

Ir

Irr

C5

2

9

Irr

r

D2

2

5

LDCI dst, src dst

 src

r

 r + 1

rr

 rr + 1

Ir

Irr

C3

– – – – – –

2

9

Irr

Ir

D3

2

9

LDE dst, src dst

 src

r

Irr

82

– – – – – –

2

5

Irr

r

92

2

5

LDEI dst, src dst

 src

r

 r + 1

rr

 rr + 1

Ir

Irr

83

– – – – – –

2

9

Irr

Ir

93

2

9

Table 20. eZ8 CPU Instruction Summary (Continued)

Assembly

Mnemonic

Symbolic
Operation

Address

Mode

Op

Code(s)

(Hex)

Flags

Fetch

Cycles

Instr.

Cycles

dst src

C Z S V D H