Zilog Z8F0130 User Manual
Page 171

eZ8
™
CPU Core
User Manual
UM012820-0810
JP Instruction
156
Attributes
2
Escaped Mode Addressing
Using Escaped Mode Addressing, address mode RR can specify a work-
ing register Pair. If the high nibble of the source or destination address is
Eh
(
1110b
), a Working Register Pair is inferred. For example, if Working
Register Pair R12 and R13 (with base address
Ch
) is the preferred destina-
tion operand, use
ECh
as the destination operand in the Op Code. To
access Register Pairs with addresses
E0h
to
EFh
, either set the Working
Group Pointer,
RP[7:4]
, to
Eh
or use indirect addressing.
Sample Usage
If Working Register Pair RR2 contains the value
3F45h
, the following
statement replaces the contents of the PC with the value
3F45h
and trans-
fers program control to that location.
JP @RR2
Object Code: C4 E2
2.
The location of the JP IRR1 instruction is moved from its former Z8 CPU Op Code location at
30h
.
Mnemonic Destination
Op
Code
(Hex)
Operand 1 Operand 2 Operand 3
JP
DA
8D
DA[15:8]
DA[7:0]
—
JP
IRR1
C4
RR1
—
—
- Z8F0131 Z8F0230 Z8F0231 Z8F0430 Z8F0431 Z8F043A Z8F0830 Z8F0831 Z8F083A Z8F1232 Z8F1233 Z8F0113 Z8F011A Z8F0123 Z8F012A Z8F0213 Z8F021A Z8F0223 Z8F022A Z8F0411 Z8F0412 Z8F0413 Z8F041A Z8F0421 Z8F0422 Z8F0423 Z8F042A Z8F0811 Z8F0812 Z8F0813 Z8F081A Z8F0821 Z8F0822 Z8F0823 Z8F082A Z8F0880 Z8F1621 Z8F1622 Z8F1680 Z8F1681 Z8F1682 Z8F2421 Z8F2422 Z8F2480 Z8F3221 Z8F3222 Z8F3281 Z8F3282 Z8F4821 Z8F4822 Z8F4823 Z8F6081 Z8F6082 Z8F6421 Z8F6422 Z8F6423 Z8F6481 Z8F6482 Z8FS021A ZMOT1AHH Z8FS040B ZMOT0BHH ZMOT0BSB Z8FMC04 Z8FMC08 Z8FMC16