Zilog Z8F0130 - Manual (Page 52)

eZ8
™
CPU Core
User Manual
UM012820-0810 Addressing Modes
30
within the current Working Register Group. This 4-bit address is com-
bined with the Page Pointer,
RP[3:0] , and the Working Group Pointer,
RP[7:4] , to form the actual 12-bit address in the Register File. The full
12-bit address is provided by {RP[3:0], RP[7:4], Address[3:0]} .
Figure 10 displays 4-bit addressing of the Register File.
Escaped Mode Addressing
Escaped mode addressing is used to directly access any Working Register
in the Register File using either an 8-bit or 4-bit addressing methodology.
Figure 10. Register Addressing Using 4-Bit Addresses
Two 4-bit
Program Memory
Addresses
(dst, src)
One Operand
Instruction
(Example)
Op Code
{dst[3:0],
12-bit address is
{RP[3:0], RP[7:4] , dst[3:0]}
src[3:0]}
Source
Destination
Register
Register
Register File
12-bit address is
{RP[3:0], RP[7:4] , src[3:0]}