Trap – Zilog Z8F0130 User Manual

Page 264

eZ8

™

CPU Core

User Manual

UM012820-0810

TRAP Instruction

249

TRAP

Definition

Software Trap.

Syntax

TRAP Vector

Operation

 SP - 2

@SP

 PC

 SP - 1

@SP

 Flags

 @Vector

Description

This new eZ8 instruction executes a software trap. The Program Counter
and Flags are pushed onto the stack. The eZ8 CPU loads the 16-bit Pro-
gram Counter with the value stored in the Trap Vector Pair. Execution
begins from the new value in the Program counter. Execute an IRET
instruction to return from a trap.

There are 256 possible Trap Vector Pairs in Program Memory. The Trap
Vector Pairs are numbered from 0 to 255. The base addresses of the Trap
Vector Pairs begin at

000h

and end at

1FEh

(510 decimal). The base

address of the Trap Vector Pair is calculated by multiplying the vector by
2.

Because IRET is used to return from TRAP, interrupts get enabled by
default. If interrupts are not enabled in your program before TRAP, you
need to execute DI after IRET so that the interrupts continue to remain
disabled.

Note:

This manual is related to the following products:

Z8F0131 Z8F0230 Z8F0231 Z8F0430 Z8F0431 Z8F043A Z8F0830 Z8F0831 Z8F083A Z8F1232 Z8F1233 Z8F0113 Z8F011A Z8F0123 Z8F012A Z8F0213 Z8F021A Z8F0223 Z8F022A Z8F0411 Z8F0412 Z8F0413 Z8F041A Z8F0421 Z8F0422 Z8F0423 Z8F042A Z8F0811 Z8F0812 Z8F0813 Z8F081A Z8F0821 Z8F0822 Z8F0823 Z8F082A Z8F0880 Z8F1621 Z8F1622 Z8F1680 Z8F1681 Z8F1682 Z8F2421 Z8F2422 Z8F2480 Z8F3221 Z8F3222 Z8F3281 Z8F3282 Z8F4821 Z8F4822 Z8F4823 Z8F6081 Z8F6082 Z8F6421 Z8F6422 Z8F6423 Z8F6481 Z8F6482 Z8FS021A ZMOT1AHH Z8FS040B ZMOT0BHH ZMOT0BSB Z8FMC04 Z8FMC08 Z8FMC16