Zilog Z8F0130 - Manual (Page 197)

eZ8
™
CPU Core
User Manual
UM012820-0810 LDX Instruction
182
Attributes
Escaped Mode Addressing
For the LDX instruction, Escaped Mode Addressing for ER addressing
mode can only be used with Op Codes
E8h and E9h . Address mode ER
for the source or destination can specify a working register with 4-bit
addressing.
Mnemonic
Destination,
Source
Op
Code
(Hex)
Operand 1 Operand 2 Operand 3
LDX r1, ER2 84 {r1,
ER2[11:8]} ER2[7:0] —
LDX @r1, ER2 85 {r1,
ER2[11:8]} ER2[7:0] —
LDX R1, @RR2 86 RR2 R1 —
LDX @R1,
@.ER(RR2) 87 RR2 R1 —
LDX r1, X(rr2) 88 {r1, rr2} X —
LDX X(rr1), r2 89 {rr1, r2} X —
LDX ER1, r2 94 {r2,
ER1[11:8]} ER1[7:0] —
LDX ER1, @r2 95 {r2,
ER1[11:8]} ER1[7:0] —
LDX @RR1, R2 96 R2 RR1 —
LDX @.ER(RR1),
@R2 97 R2 RR1 —
LDX ER1, ER2 E8 ER2[11:4] {ER2[3:0],
ER1[11:8]} ER1[7:0]
LDX ER1, IM E9 IM {0h,
ER1[11:8]} ER1[7:0]