Zilog Z8F0130 - Manual (Page 60)

eZ8
™
CPU Core
User Manual
UM012820-0810 Illegal Instruction Traps
45
Illegal Instruction Traps
The instruction set of the eZ8
™
CPU does not cover all possible
sequences of binary values. Binary values and sequences for which no
operation is defined are illegal instructions. When the eZ8 CPU fetches
one of these illegal instructions, it performs an Illegal Instruction Trap
operation.
The Illegal Instruction Trap functions similarly to a TRAP #%3
instruction (object code
F2h 03h ). The Flags and Program Counter are
pushed on the stack. When the Program Counter detects an illegal
instruction it does not increment. The Program Counter value that is
pushed onto the stack points to the illegal instruction.
The most significant byte (MSB) of the Illegal Instruction Trap Vector is
stored at Program Memory address
0006h . The least significant byte
(LSB) of the Illegal Instruction Trap Vector is stored at Program Memory
address
0007h . The 16-bit Illegal Instruction Trap Vector replaces the
value in the Program Counter (PC). Program execution resumes from the
new value in the Program Counter.
An IRET instruction must not be performed following an Illegal
Instruction Trap service routine. Because the stack contains the
Program Counter value of the illegal instruction, the IRET
instruction returns the code execution to this illegal instruction.
Symbolic Operation of an Illegal Instruction Trap
SP
 SP - 2
@SP
 PC
SP
 SP - 1
@SP
 Flags
PC
 Vector
Caution: