Zilog Z8F0130 - Manual (Page 16)

eZ8
™
CPU Core
User Manual
UM012820-0810 Architectural Overview
1
Architectural Overview
Zilog’s eZ8
™
CPU is the latest 8-bit central processing unit (CPU)
designed to meet the continuing demand for faster and more code-effi-
cient microcontrollers. The eZ8 CPU executes a superset of the original
Z8

instruction set. The features of the eZ8 CPU include:
•
Direct register-to-register architecture, which allows each register to
function as an accumulator to improve execution time and decrease
the amount of required program memory
•
A software stack that allows much greater depth in subroutine calls
and interrupts than hardware stacks
•
Compatibility with the Z8 assembly instruction set.
•
An expanded internal register file that allows access of up to 4 KB.
•
New instructions that improve execution efficiency for code devel-
oped using higher-level programming languages, including C.
•
Pipelined instruction fetch and execution
Processor Description
The eZ8 CPU consists of the following two major functional blocks:
•
Fetch Unit
•
Execution Unit
The Execution Unit is further divided into the Instruction State Machine,
Program Counter, CPU Control Registers, and Arithmetic Logic Unit
(ALU).
Figure 1 displays the eZ8 CPU architecture.