Zilog Z8F0130 - Manual (Page 211)

eZ8
™
CPU Core
User Manual
UM012820-0810 ORX Instruction
196
Attributes
Escaped Mode Addressing
Using Escaped Mode Addressing, address mode ER for the source or des-
tination can specify a working register with 4-bit addressing.
If the high byte of the source or destination address is EEh ( 11101110b ),
a working register is inferred. For example, the operand EE3h selects
Working Register R3. The full 12-bit address is provided by {RP[3:0],
RP[7:4], 3h} .
To access registers on Page Eh (addresses E00h to EFFh ), set the Page
Pointer, RP[3:0], to Eh and set the Working Group Pointer, RP[7:4] , to
the preferred Working Group.
Sample Usage
If Register 93Ah contains the value F5h ( 11110101b ) and Register 142h
contains the value 0Ah ( 00001010b ), the following statement leaves the
value FFh ( 11111111b ) in Register 93Ah , sets the S flag, and clears the
Z and V flags:
ORX 93Ah, 142h

Object Code: 48 14 29 3A
If Register D7Ah contains the value 07h ( 00000111b ), the following
statement leaves the value 67h ( 01100111b ) in Register D7Ah and clears
the S, Z, and V flags:
ORX D7Ah, #01100000b

Object Code: 49 60 0D 7A
Mnemonic
Destination,
Source Op Code
(Hex)
Operand 1 Operand 2 Operand 3
ORX ER1, ER2 48 ER2[11:4] {ER2[3:0],
ER1[11:8]} ER1[7:0]
ORX ER1, IM 49 IM {0h,
ER1[11:8]} ER1[7:0]