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Power measurement, Power measurement –28 – Altera Cyclone IV GX Transceiver Starter Board User Manual

Page 36

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2–28

Chapter 2: Board Components

Power Supply

Cyclone IV GX Transceiver Starter Board Reference Manual

© March 2010 Altera

Corporation

Power Measurement

There are six power supply rails which have on-board voltage and current sense
capabilities. The power supply rails are split from the primary supply plane by a
low-value sense resistor for the 8-channel differential input 24-bit ADC device to
measure voltage and current. A SPI bus connects the ADC device to the MAX II CPLD
EPM2210 System Controller as well as the Cyclone IV GX Transceiver.

Figure 2–8

shows the block diagram for the power measurement circuitry.

Table 2–33

lists the targeted rails. The schematic signal name column specifies the

name of the rail being measured and the device pin column specifies the devices
attached to the rail. If no subnet is named, the power is the total output power for that
voltage.

Figure 2–8. Power Measurement Circuit

SCK

DSI

DSO

CSn

8 Ch.

Power Supply Load #N

Supply

#N

R

SENSE

MAX II CPLD

EPM2210

System

Controller

MAX II CPLD

EPM240M100

USB
PHY

To User PC
Power GUI

JTAG Chain

Embedded
USB-Blaster

Feedback

Power Supply Load #0

Supply

#0

R

SENSE

Feedback

Table 2–33. Power Rails Measurement Based on the Rail Selected in the Power GUI

Rail

Schematic Signal Name

Voltage (V)

Device Pin

Description

1

2.5_VCC

2.5

VCCA

FPGA PLL analog power

2.5

VCC_CLKIN

V

IO

clock input pins

2

1.2_VCCL_GXB

1.2

VCCL_GXB

Transceiver physical medium attachment
(PMA) and auxiliary power

3

2.5_VCC_GXB

2.5

VCCH_GXB

Transceiver output buffer power

2.5

VCCA_GXB

Transceiver PMA power

4

2.5_VCCIO

2.5

VCCIO

FPGA I/O bank power

5

1.2_VCCINT

1.2

VCCINT

FPGA core voltage and PCI Express hard IP
block power

6

1.2_VCCD_PLL

1.2

VCCD_PLL

FPGA PLL digital power