Parameters, Interface settings, Parameters –7 – Altera POS-PHY Level 2 and 3 Compiler User Manual
Page 35: Interface settings –7, Fifo buffer & clock selector options –7, Fifo buffer & clock selector options

Chapter 3: Functional Description
3–7
Parameters
© November 2009
Altera Corporation
POS-PHY Level 2 and 3 Compiler User Guide
Preliminary
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For the POS-PHY receive interface:
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The sop_ina input goes low
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The addr_outa output goes low
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The dpav_outa output goes low
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The ppav_outa output goes low
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The spav_outa output goes low
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The rd_outa output goes low
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For the POS-PHY transmit interface:
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The wr_outA output goes low
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The val_outA output goes low
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'The sx_outA output goes low
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The sop_outA output goes low
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'The eop_outA output goes low
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The err_outA output goes high
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The data_outA output goes low
f
For more information on OpenCore Plus hardware evaluation, see
and
Parameters
The function’s parameters, which can only be set in IP Toolbench (see
), include the following settings:
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■
■
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Address & Packet Available Settings
Interface Settings
FIFO Buffer & Clock Selector Options
The following interface ‘B’ FIFO buffer and clock selector options are available:
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A Clock (No FIFO buffer)—only available if the ‘B’ interface is an Atlantic master,
and the ‘B’ interface bus width
≥ the ‘A’ interface bus width. The relevant ‘B’
interface does not use an internal FIFO buffer, and is clocked by the ‘A’ interface
clock pin. This is recommended only if you connect ‘B’ interfaces directly to
another MegaCore function with an Atlantic slave interface
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A Clock—the corresponding ‘B’ interface uses an internal single clock FIFO buffer,
and is clocked by the A interface clock pin