Altera POS-PHY Level 2 and 3 Compiler - Manual (Page 11)

Chapter 1: About This Compiler 1–7
Performance and Resource Utilization
© November 2009 Altera Corporation POS-PHY Level 2 and 3 Compiler User Guide
Preliminary
Table 1–10. Performance—POS-PHY Level 3 PHY Layer—Cyclone III Device
MegaCore Function LEs
Memory Blocks
f
MAX
(MHz) M4K
SPHY receive 350 2 174
SPHY transmit 365 2 173
MPHY 4-port receive 1,175 8 169
MPHY 4-port transmit 1,218 8 143
Table 1–11. Performance—POS-PHY Level 3 PHY Layer—Stratix III Device
MegaCore Function ALUTs
Logic
Registers
Memory Blocks
f
MAX
(MHz) M9K
SPHY receive 121 307 2 270
SPHY transmit 160 294 2 287
MPHY 4-port receive 489 999 8 245
MPHY 4-port transmit 587 984 8 231
Table 1–12. Performance—POS-PHY Level 3 PHY Layer—Stratix IV Device
MegaCore Function ALUTs
Logic
Registers
Memory Blocks
f
MAX
(MHz) M9K
SPHY receive 121 307 2 243
SPHY transmit 160 294 2 286
MPHY 4-port receive 489 999 8 222
MPHY 4-port transmit 587 984 8 260