Asus P/I-P55SP3AV - Manual (Page 39)

P/I-P55SP3AV User's Manual
Chipset Features Setup
This screen controls the settings for the board's chip set. Naviga­
tion and controls for this screen are the same as for the previous
screen.
Chipset Features Screen
ROM PCI/ISA BIOS(PI-55SP3AV)
CHIPSET FEATURES SETUP
AWARD SOFTWARE INC.
Auto Configuration Enabled ISA Bus Clock Frequency PCICLK/3
L2 (WB) Tag Bit Length 7bits 16-bit ISA Wait State 1 Wait
Async SRAM Leadoff 3/4 16-bit I/O Recory Time 5 BUSCLK
Async SRAM Burst Timing 2T 8-bit I/O Recory Time 8 BUSCLK
FP CAS Precharge IT Video BIOS Cacheable Enabled
RAS To CAS delay time 4T Onboard VGA Mem Size 1MB
FP RAS Precharge time
RAS active when refresh
4T
5T Onboard VGA Mem Frequency Normal
CAS delay in post-write IT Allocate Memory Hole Disabled
EDO CAS pulse Width R1/W2 Hole Start Address OFCOOOOH
EIX) CAS Precharge time
EDO RAS Precharge time
L2 Cache Update Mode
Next Address (NA#)
IT
4T
WB
Disabled
Hole Size 256KB
CPU to PCI Burst Write
CPU to PCI Post Write
CPU-PCl Post Write Rate
Snoop PCI Master Write
Snoop PCI Master Read
Slow Refresh (1:4)
Enabled
Enabled
4T
Enabled
Enabled
Disabled
ESC Quit Ti—><— : Select Item
Fl Help PU/PD/+/- : Modi fy
F5 Old Values (SHIFT)F2 : Color
F6 Load BIOS Defaults
F7 Load Setup Defaults
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